CH571F

WCH · CH571 Series

In production 32 bit · RV32IMAC Low-power data
Max clock
20MHz
SRAM
18KB
On-chip Flash
192KB
Active current
—
Sleep current
1.4µA
Supply voltage
2.3–3.6V

Overview

CH571F is a WCH-bit RISC-V MCU from 32, built on the WCH in-house QingKe V3A core (RV32IMAC), with a maximum clock of 20 MHz, 18 KB of on-chip SRAM, and 192 KB KB of Flash.

Core and memory

VendorWCH(Chinese mainland)
IP brand / originWCH in-house(Chinese mainland)
CoreQingKe V3A
ISA / bit widthRV32IMAC · 32 bit
Max clock20 MHz
SRAM18 KB
On-chip Flash192 KB

Power and electrical

Active current
—
Sleep current
1.4 µA
Standby / shutdown
0.3 µA

Conditions and notes: The vendor or source notes are in Chinese in the original DS V1.12(CH573/CH571 共用): 内置 DC-DC,0dBm 发射 6mA;Idle 1.5mA;Halt 320µA;Sleep 1.4~6µA(多档); Shutdown 0.3~1.3µA(多档)。无按 MHz 归一化的 Run 电流表。

Supply voltage2.3–3.6 V
Operating temperature-40 ℃ ~ 85 ℃

Peripherals and interfaces

UART / USART2 way
SPI1 way
I²C1 way
USB Full-Speed1 way
BLE1 way
ADC6 channels · 12 bit
OtherThe vendor or source notes are in Chinese in the original BLE 4.2,RX -96dBm,TX 可编程至 +5dBm;192K CodeFlash + 24K BootLoader + 32K DataFlash;USB 仅设备模式;ADC 不支持 DMA

Sources and notes

Confidence:High (official datasheet) · Last verified 2026-11-04

The vendor or source notes are in Chinese in the original CH571 = CH573 精简版:无 USB Host、无 TouchKey、无 8-bit PWM、UART 2 个、FlashROM 仅 256KB、ADC 不支持 DMA。同系列 CH571D=QFN20/15 GPIO、CH571K=ESSOP10/4 GPIO。