For your next product,
pick the right RISC-V
Chinese RISC-V vendors are scattered, specs are quoted differently, and documentation is hard to find. This site turns MCUs, IP cores, solution packages, and AI compute into an intelligence library you can filter, compare, and trace back to sources.
Select an MCU
Filter by clock speed, SRAM, Flash, power, peripherals, package, and ecosystem; compare side by side.
Select an IP core
Look at core lineage, ISA extensions, pipeline, licensing model, and production maturity.
Select a solution
From IoT industry-education to motor control: turning a scenario into a selection list.
Select AI compute
Throughput, precision, frameworks, and toolchain maturity for NPU IP and AI SoCs (preview).
Two real customer constraints, already turned into filter conditions
“A low-power product around 100 MHz.” “Small enough for 64 KB of memory at 40 MHz.” Click to load those conditions, then fine-tune them for your project.
IoT industry-education · 100 MHz, low power
64–128 MHz, preferring low active current and sleep current; suited to sensor nodes, teaching platforms, and volume IoT.
Open this filter →Minimal resources · 40 MHz / 64 KB Flash
Clock ≤ 64 MHz, 32–128 KB Flash, low power preferred; follows the common convention that "64 KB memory" means Flash. If you meant SRAM, set the SRAM minimum to 64 KB.
Open this filter →Wireless · BLE / Wi-Fi
RISC-V SoCs with built-in BLE or Wi-Fi, cutting RF peripherals and certification cost.
Open this filter →Motor control · FOC
12-bit ADC, complementary PWM, comparators, and op-amps, aimed at fans, pumps, and gimbals.
Open this filter →An empty power field means the vendor has not published comparable data; it does not mean zero power. Values converted from mA state their conditions on the detail page.
Recently added to the catalog
Ordered by release year and verification date. Every record links to a vendor product page or datasheet.
| Part / vendor | IP core | Clock | SRAM | Flash | Power | Status |
|---|---|---|---|---|---|---|
| CH32V407VET6WCH | 沁恒自研QingKe V3V | 200 MHz | 200 KB | 992 KB | 108 µA/MHz | In production |
| ESP32-C5HF4Espressif | 乐鑫自研Espressif HP RISC-V + LP RISC-V | 240 MHz | 384 KB | 4096 KB | 108.33 µA/MHz | In production |
| ESP32-C61HF4Espressif | 乐鑫自研Espressif ESP-RISC-V (single core) | 160 MHz | 320 KB | 4096 KB | 100 µA/MHz | In production |
| ESP32-P4NRW16XEspressif | 乐鑫自研Espressif HP dual-core RISC-V + LP RISC-V | 400 MHz | 768 KB | None | 172.5 µA/MHz | In production |
| ESP32-P4NRW32XEspressif | 乐鑫自研Espressif HP dual-core RISC-V + LP RISC-V | 400 MHz | 768 KB | None | 172.5 µA/MHz | In production |
| CH32H417QEU6WCH | 沁恒自研QingKe V5F + V3F (双核) | 400 MHz | 896 KB | 960 KB | 184 µA/MHz | In production |
Not another vendor brochure
Turning “searchable” into “comparable, traceable, correctable” is what sets this site apart from an ordinary product list.
China has RISC-V alliances, but no unified selection library
RISC-V International owns the standard; CRVIC and CRVA drive the industry and open-source ecosystem. Device-level, comparable data is still scattered — exactly the gap tryriscv.org fills.
Defines the global RISC-V instruction set and extension standards, and owns the ISA specifications, certification, and ecosystem outreach.
China's RISC-V industry alliance, coordinating work across IP, chips, toolchains, and talent development.
Initiated by the Institute of Computing Technology, Chinese Academy of Sciences; focuses on the open instruction-set ecosystem, the XiangShan processor, and open-source community work.
The entry point for RISC-V International community events, technical working groups, and developer meetups in China.
Nothing fits? Tell us what you need.
Scenario, clock speed, memory, peripherals, power, and time to production — spell out these six and we will turn the reusable parts into a new solution package and reply with a candidate list in the issue.